1. Field of the Invention
The present invention is directed generally to photolithography. More particularly, the present invention relates to wafer alignment in a photolithographic system.
2. Related Art
Photolithography (also called microlithography) is a semiconductor device fabrication technology. Photolithography uses radiation, such as ultraviolet or visible light, to generate fine patterns in a semiconductor device design. Many types of semiconductor devices, such as diodes, transistors, and integrated circuits, can be fabricated using photolithographic techniques. Exposure systems or tools are used to implement photolithographic techniques, such as etching, in semiconductor fabrication. An exposure system typically includes an illumination system, a reticle (also called a mask) or spatial light modulator (SLM) for creating a circuit pattern, a projection system, and a wafer alignment stage for aligning a photosensitive resist-covered semiconductor wafer. The illumination system illuminates a region of the reticle or SLM with a preferably rectangular slot illumination field. The projection system projects an image of the illuminated region of the reticle circuit pattern onto the wafer.
As semiconductor device manufacturing technology advances, there are ever increasing demands on each component of the photolithography system used to manufacture the semiconductor device. This includes increasing demands on the accuracy of the wafer alignment. A wafer is typically mounted on a wafer chuck, also referred to as a wafer table. During exposure, the features being exposed on the wafer need to overlay existing features on the wafer. To achieve overlay performance, the wafer is aligned to the wafer stage prior to exposure. Any movement of the wafer relative to the wafer stage after alignment results in overlay errors.
During exposure, the wafer is heated locally due to the energy transferred to the wafer from the exposure beam. This heating causes the wafer to expand. If the wafer expansion is unchecked, the expansion exceeds overlay error requirements. Clamping the wafer to the wafer chuck reduces the amount the wafer expands. The wafer chuck is typically designed to have a larger thermal mass than the wafer and is manufactured of a material which has very low thermal expansion. This results in relatively little expansion of the wafer chuck relative to the wafer. The wafer chuck is also typically designed to be much stiffer than the wafer, such that if the wafer is sufficiently clamped to the wafer chuck, the thermal expansion of the wafer is reduced.
If the clamping force between the wafer and the wafer chuck is not sufficient to prevent wafer expansion, the wafer can slip on the wafer chuck and larger wafer expansion will occur, resulting in larger overlay errors. Slipping due to wafer expansion can be reduced by tightly clamping the wafer to the surface of the wafer chuck with a vacuum. This creates a frictional force between the wafer and the wafer chuck. However, if the wafer expansion force exceeds the frictional force, the wafer will slip, causing an overlay error. In extreme ultraviolet (“EUV”) systems, the chances of slipping increase because the environment surrounding the wafer during exposure is also a vacuum. Electrostatic clamping, which is much weaker than vacuum clamping, must thus be used in lieu of a vacuum clamp.
Therefore, what is needed is a system and method for reducing the effects of wafer expansion during exposure.